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EnigmA Amiga Run 1997 February
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EnigmA AMIGA RUN 15 (1997)(G.R. Edizioni)(IT)[!][issue 1997-02][PLANET CD V].iso
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6502emu.lha
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6502
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6502emu.s
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1996-11-17
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include myincs/Macros.i
include exec/memory.i
include exec/exec_lib.i
include intuition/intuition.i
include intuition/intuition_lib.i
include dos/dos.i
include dos/dos_lib.i
include graphics/graphics_lib.i
;==========================================================================
;Equs
;==========================================================================
carry equ 0
zero equ 1
interrupt equ 2
decimal equ 3
break equ 4
overflow equ 6
negative equ 7
Rows equ 25
Columns equ 40
ScreenBase equ $400
MemSize equ $10000
;==========================================================================
;Program
;==========================================================================
start move.l a7,oldsp
libopen Int
libopen Gfx
libopen Dos
push.l a0-a3/d0
pop.l a0-a3/d0
move.l #0,a1
libcall Exec,FindTask
move.l d0,a1
move.w #-1,d0
libcall Exec,SetTaskPri
lea myNewWindow,a0
libcall Int,OpenWindow
move.l d0,WinPtr
tst.l d0
beq Cleanup
move.l WinPtr,a0
move.l #menu0,a1
libcall Int,SetMenuStrip
move.l WinPtr,a1
move.l wd_RPort(a1),myRastPort
move.l wd_UserPort(a1),UserPort
move.l myRastPort,a1
move.l #1,d0
libcall Gfx,SetAPen
move.l #MemSize,d0
move.l #MEMF_PUBLIC|MEMF_CLEAR,d1
libcall Exec,AllocMem ;allocate 64K mem
move.l d0,a2
move.l d0,mem6502
tst.l d0
beq Cleanup
clr.w d7
;==========================================================================
bsr getfilename ;load the 6502-kernal
tst.l d0
beq gmsg
move.l #namebuffer,d1
move.l #MODE_OLDFILE,d2
libcall Dos,Open
move.l d0,filefh
tst.l d0
beq noload
move.l filefh,d1
move.l #temp,d2
move.l #2,d3
libcall Dos,Read
move.w temp,d0
bsr lhtohl
move.l #MemSize,d3
sub.l d0,d3
move.l mem6502,d2
add.l d0,d2
move.l filefh,d1
libcall Dos,Read
move.l filefh,d1
libcall Dos,Close
;==========================================================================
noload move.l mem6502,a2
add.l #$fffc,a2
move.w (a2),d0
bsr lhtohl
move.w d0,pc6502 ;initalize PC
move.b #$ff,stack ;initalize SP
;==========================================================================
getop
gmsg move.l UserPort,a0
libcall Exec,GetMsg ;get message from Intuition
tst.l d0
beq nomsg ;d0=0 => no message has arrived
move.l d0,a1
move.l im_Class(a1),d2
move.w im_Code(a1),d3
libcall Exec,ReplyMsg ;reply to msg
cmp.l #IDCMP_INTUITICKS,d2 ;timer, about 10 msgs/sec
call eq,IRQHandler
cmp.l #IDCMP_CLOSEWINDOW,d2
beq Cleanup
cmp.l #IDCMP_VANILLAKEY,d2
bne.s menuchk
move.l #$dc01,d0
move.l mem6502,a0 ;move ascii-code for pressed key
move.b d3,(a0,d0.l) ; to 6502-address $dc01
bra.s gmsg
;==========================================================================
menuchk cmp.l #IDCMP_MENUPICK,d2
bne.s gmsg
move.w d3,d6
move.w d3,d7
and.w #$1f,d6
lsr.w #5,d7 ;menu in d6
and.w #$3f,d7 ;item in d7
move.b d6,d1
lsl.w #8,d1
move.b d7,d1
lea menutable,a1
getmenu move.w (a1)+,d0
move.l (a1)+,a0
cmp.w #-1,d0
beq gmsg
cmp.w d0,d1
bne.s getmenu
jsr (a0)
bra gmsg
;==========================================================================
nomsg btst.b #0,traceonoff
beq notrace ;check if trace is on
btst.b #interrupt,status_reg ;no tracing in interrupts
beq notrace
clr.w d0
move.b stack,tracesp+1 ;the values of the 6502-regs
move.b status_reg,tracesr+1 ; before the instruction
move.b a_reg,traceacc+1 ; is executed
move.b x_reg,tracex+1
move.b y_reg,tracey+1
move.w pc6502,tracepc
;==========================================================================
notrace bsr getbyte
and.w #$ff,d0
lsl.w #1,d0
lea optable,a0
move.b (a0,d0.w),instr
move.b 1(a0,d0.w),adrmode
move.b instr,d0
and.w #$ff,d0
lsl.w #2,d0
lea instructions,a0
move.l (a0,d0.w),a1 ;get pointer to code to call
jsr (a1) ;jump to code for 6502-instruction
;==========================================================================
btst.b #0,traceonoff
beq getop ;check if trace is on
btst.b #interrupt,status_reg
beq getop ;no trace during interrupts
move.b instr,d0
and.w #$ff,d0
lsl.w #2,d0
lea opstrings,a0
move.l (a0,d0.w),traceop
move.b adrmode,d0
and.w #$ff,d0
lsl.w #3,d0
add.w #4,d0
lea adrmodes,a1
move.l (a1,d0.w),a0
lea traceadr,a1
bsr copystr
lea tracestr,a0
lea tracesr,a1
lea stuffchar,a2
lea traceoutput,a3
libcall Exec,RawDoFmt ;format trace string
lea traceoutput,a0
bsr strlen
move.l d0,d3
move.l #traceoutput,d2
move.l tracefh,d1
tst.l d1
beq getop
libcall Dos,Write ;print trace string
clr.w tracedata
bra getop
;==========================================================================
;6502-instructions
;==========================================================================
adc65 bsr getadr
move.w d0,d1
bsr readadr
move.b a_reg,d1
move status_reg,ccr
btst #decimal,status_reg ;check if BCD-mode is on
bne.s .nobcd
abcd.b d0,d1
bra.s .skip
.nobcd add.b d0,d1
.skip bclr #carry,status_reg
bcc.s .nocarry
bset #carry,status_reg
.nocarry move.b a_reg,d2
move.b d1,d3
and.b #%01000000,d2
and.b #%01000000,d3
cmp.b d2,d3 ;check if overflow has occured
beq.s .nooverflow
bset #overflow,status_reg
.nooverflow move.b d1,d0
move.b d1,a_reg
bsr testsign
rts
;==========================================================================
and65 bsr getadr
move.w d0,d1
bsr readadr
and.b d0,a_reg
move.b a_reg,d0
bsr testsign
rts
;==========================================================================
asl65 bsr getadr
move.w d0,d2
move.l a0,a2
move.b a_reg,d0
cmp.l #0,a0
beq.s .acc
bsr readadr
.acc bclr #carry,status_reg
lsl.b #1,d0
bcc.s .nocarry
bset #carry,status_reg
.nocarry move.b d0,d3
bsr testsign
cmp.l #0,a2
bne.s .noacc
move.b d3,a_reg
rts
.noacc move.b d3,d0
move.w d2,d1
bsr writeadr
rts
;==========================================================================
bcc65 btst #carry,status_reg
beq branch
bsr getadr
rts
;==========================================================================
bcs65 btst #carry,status_reg
bne branch
bsr getadr
rts
;==========================================================================
beq65 btst #zero,status_reg
bne branch
bsr getadr
rts
;==========================================================================
bit65 bsr getadr
move.l d0,d1
move.l a0,a2
bsr readadr
move.b a_reg,d1
bclr #zero,status_reg
bclr #negative,status_reg
bclr #overflow,status_reg
and.b d0,d1
bne.s .notzero
bset #zero,status_reg
.notzero btst #7,(a2)
beq.s .notneg
bset #negative,status_reg
.notneg btst #6,(a2)
ret eq
bset #overflow,status_reg
rts
;==========================================================================
bmi65 btst #negative,status_reg
bne branch
bsr getadr
rts
;==========================================================================
bne65 btst #zero,status_reg
beq branch
bsr getadr
rts
;==========================================================================
bpl65 btst #negative,status_reg
beq branch
bsr getadr
rts
;==========================================================================
brk65 bset #break,status_reg
move.w pc6502,d0
inc.w d0
bsr hltolh
move.w d0,d3
bsr putstack ;push low-byte of PC
lsr.w #8,d3
move.b d3,d0
bsr putstack ;push high-byte of PC
move.b status_reg,d0
bsr putstack ;push the SR
bset #interrupt,status_reg
move.l mem6502,a0
add.l #$fffe,a0
move.w (a0),d0
bsr lhtohl
move.w d0,pc6502 ;jump to interrupt-routine
rts
;==========================================================================
bvc65 btst #overflow,status_reg
beq branch
bsr getadr
rts
;==========================================================================
bvs65 btst #overflow,status_reg
bne branch
bsr getadr
rts
;==========================================================================
clc65 bclr #carry,status_reg
rts
;==========================================================================
cld65 bclr #decimal,status_reg
rts
;==========================================================================
cli65 bclr #interrupt,status_reg
rts
;==========================================================================
clv65 bclr #overflow,status_reg
rts
;==========================================================================
cmp65 bsr getadr
move.l d0,d1
bsr readadr
bclr #carry,status_reg
sub.b a_reg,d0
blt.s .nocarry
bset #carry,status_reg
.nocarry bsr testsign
rts
;==========================================================================
cpx65 bsr getadr
move.l d0,d1
bclr #carry,status_reg
bsr readadr
sub.b x_reg,d0
blt.s .nocarry
bset #carry,status_reg
.nocarry bsr testsign
rts
;==========================================================================
cpy65 bsr getadr
move.l d0,d1
bclr #carry,status_reg
bsr readadr
sub.b y_reg,d0
blt.s .nocarry
bset #carry,status_reg
.nocarry bsr testsign
rts
;==========================================================================
dec65 bsr getadr
move.l d0,d1
push.w d1
bsr readadr
dec.b d0
pop.w d1
move.b d0,d2
bsr writeadr
move.b d2,d0
bsr testsign
rts
;==========================================================================
dex65 dec.b x_reg
move.b x_reg,d0
bsr testsign
rts
;==========================================================================
dey65 dec.b y_reg
move.b y_reg,d0
bsr testsign
rts
;==========================================================================
eor65 bsr getadr
move.l d0,d1
bsr readadr
eor.b d0,a_reg
move.b a_reg,d0
bsr testsign
rts
;==========================================================================
inc65 bsr getadr
move.l d0,d1
push.w d1
bsr readadr
inc.b d0
pop.w d1
move.b d0,d2
bsr writeadr
move.b d2,d0
bsr testsign
rts
;==========================================================================
inx65 inc.b x_reg
move.b x_reg,d0
bsr testsign
rts
;==========================================================================
iny65 inc.b y_reg
move.b y_reg,d0
bsr testsign
rts
;==========================================================================
jmp65 bsr getadr
move.w d0,pc6502
rts
;==========================================================================
jsr65 bsr getadr
move.w d0,d3
move.b pc6502,d0
bsr putstack
move.b pc6502+1,d0
bsr putstack
move.w d3,pc6502
rts
;==========================================================================
lda65 bsr getadr
move.l d0,d1
bsr readadr
move.b d0,a_reg
bsr testsign
rts
;==========================================================================
ldx65 bsr getadr
move.l d0,d1
bsr readadr
move.b d0,x_reg
bsr testsign
rts
;==========================================================================
ldy65 bsr getadr
move.l d0,d1
bsr readadr
move.b d0,y_reg
bsr testsign
rts
;==========================================================================
lsr65 bsr getadr
move.l d0,d1
move.w d1,d2
move.l a0,a2
move.b a_reg,d0
cmp.l #0,a0
beq.s .acc
bsr readadr
.acc bclr #carry,status_reg
lsr.b #1,d0
bcc.s .nocarry
bset #carry,status_reg
.nocarry move.b d0,d3
bsr testsign
cmp.l #0,a2
bne.s .noacc
move.b d3,a_reg
rts
.noacc move.b d3,d0
move.w d2,d1
bsr writeadr
rts
;==========================================================================
nop65 bsr getadr
rts
;==========================================================================
ora65 bsr getadr
move.l d0,d1
bsr readadr
or.b d0,a_reg
move.b a_reg,d0
bsr testsign
rts
;==========================================================================
pha65 move.b a_reg,d0
bsr putstack
rts
;==========================================================================
php65 move.b status_reg,d0
bsr putstack
rts
;==========================================================================
pla65 bsr getstack
move.b d0,a_reg
bsr testsign
rts
;==========================================================================
plp65 bsr getstack
move.b d0,status_reg
rts
;==========================================================================
rol65 bsr getadr
move.l d0,d1
move.b a_reg,d0
move.l a0,a2
move.w d1,d3
cmp.l #0,a0
beq.s .acc
bsr readadr
.acc move.b status_reg,d2
lsl.b #7,d2
ext.w d2
move.b d0,d2
rol.w #1,d2
move.b d2,d0
lsr.w #8,d2
and.b #$fe,d2
or.b d2,status_reg
push.w d0
bsr testsign
pop.w d0
cmp.l #0,a2
bne.s .noacc
move.b d0,a_reg
rts
.noacc move.w d3,d1
bsr writeadr
rts
;==========================================================================
ror65 bsr getadr
move.l d0,d1
move.b a_reg,d0
move.l a0,a2
move.w d1,d3
cmp.l #0,a0
beq.s .acc
bsr readadr
.acc move.b status_reg,d2
lsl.b #7,d2
ext.w d2
move.b d0,d2
ror.w #1,d2
move.b d2,d0
rol.w #1,d2
and.b #1,d2
or.b d2,status_reg
push.w d0
bsr testsign
pop.w d0
cmp.l #0,a2
bne.s .noacc
move.b d0,a_reg
rts
.noacc move.w d3,d1
bsr writeadr
rts
;==========================================================================
rti65 bsr getstack
move.b d0,status_reg
bsr getstack
move.b d0,pc6502+1
bsr getstack
move.b d0,pc6502
rts
;==========================================================================
rts65 bsr getstack
move.b d0,pc6502+1
bsr getstack
move.b d0,pc6502
rts
;==========================================================================
sbc65 bsr getadr
move.l d0,d1
bsr readadr
move.b a_reg,d1
move status_reg,ccr
btst #decimal,status_reg
bne.s .nobcd
sbcd.b d0,d1
bra.s .skip
.nobcd sbc.b d0,d1
.skip bclr #carry,status_reg
bcc.s .nocarry
bset #carry,status_reg
.nocarry move.b a_reg,d2
move.b d1,d3
and.b #%01000000,d2
and.b #%01000000,d3
cmp.b d2,d3
beq.s .nooverflow
bset #overflow,status_reg
.nooverflow move.b d1,d0
move.b d1,a_reg
bsr testsign
rts
;==========================================================================
sec65 bset #carry,status_reg
rts
;==========================================================================
sed65 bset #decimal,status_reg
rts
;==========================================================================
sei65 bset #interrupt,status_reg
rts
;==========================================================================
sta65 bsr getadr
move.l d0,d1
move.b a_reg,d0
bsr writeadr
rts
;==========================================================================
stx65 bsr getadr
move.l d0,d1
move.b x_reg,d0
bsr writeadr
rts
;==========================================================================
sty65 bsr getadr
move.l d0,d1
move.b y_reg,d0
bsr writeadr
rts
;==========================================================================
tax65 move.b a_reg,d0
move.b d0,x_reg
bsr testsign
rts
;==========================================================================
tay65 move.b a_reg,d0
move.b d0,y_reg
bsr testsign
rts
;==========================================================================
tsx65 move.b stack,d0
move.b d0,x_reg
bsr testsign
rts
;==========================================================================
txa65 move.b x_reg,d0
move.b d0,a_reg
bsr testsign
rts
;==========================================================================
txs65 move.b x_reg,stack
rts
;==========================================================================
tya65 move.b y_reg,d0
move.b d0,a_reg
bsr testsign
rts
;==========================================================================
anc65
;==========================================================================
ane65
;==========================================================================
arr65
;==========================================================================
asr65
;==========================================================================
dcp65
;==========================================================================
isb65
;==========================================================================
jam65
;==========================================================================
lae65
;==========================================================================
lax65
;==========================================================================
lxa65
;==========================================================================
rla65
;==========================================================================
rra65
;==========================================================================
sax65
;==========================================================================
sbx65
;==========================================================================
sha65
;==========================================================================
shs65
;==========================================================================
shx65
;==========================================================================
shy65
;==========================================================================
slo65
;==========================================================================
sre65
;==========================================================================
illegal65 rts ;illegal instruction
;==========================================================================
;Subroutines
;==========================================================================
Cleanup tst.l tracefh
beq.s win
move.l tracefh,d1
libcall Dos,Close
win tst.l WinPtr
beq.s next
move.l WinPtr,a0
libcall Int,ClearMenuStrip
move.l WinPtr,a0
libcall Int,CloseWindow
next libclose Gfx
libclose Int
libclose Dos
tst.l mem6502
beq.s quit
move.l mem6502,a1
move.l #MemSize,d0
libcall Exec,FreeMem
quit clr.l d0
move.l oldsp,a7
rts
;==========================================================================
IRQHandler btst #interrupt,status_reg
ret ne
move.b pc6502,d0
bsr putstack
move.b pc6502+1,d0
bsr putstack
move.b status_reg,d0
bsr putstack
move.l mem6502,a0
add.l #$fffe,a0
move.w (a0),d0
bsr lhtohl
move.w d0,pc6502
bset #interrupt,status_reg
rts
;==========================================================================
NMIHandler move.b pc6502,d0
bsr putstack
move.b pc6502+1,d0
bsr putstack
move.b status_reg,d0
bsr putstack
move.l mem6502,a0
add.l #$fffa,a0
move.w (a0),d0
bsr lhtohl
move.w d0,pc6502
bset #interrupt,status_reg
rts
;==========================================================================
menuload bsr getfilename
tst.l d0
beq gmsg
move.l #namebuffer,d1
move.l #MODE_OLDFILE,d2
libcall Dos,Open
move.l d0,filefh
tst.l d0
beq gmsg
move.l filefh,d1
move.l #temp,d2
move.l #2,d3
libcall Dos,Read
clr.l d0
move.w temp,d0
move.w d0,pc6502
move.l #MemSize,d3
sub.l d0,d3
move.l mem6502,d2
add.l d0,d2
move.l filefh,d1
libcall Dos,Read
move.l filefh,d1
libcall Dos,Close
rts
;==========================================================================
menusave bsr getfilename
tst.l d0
beq gmsg
move.l #namebuffer,d1
move.l #MODE_NEWFILE,d2
libcall Dos,Open
move.l d0,filefh
tst.l d0
beq gmsg
move.l filefh,d1
clr.l temp
move.l #temp,d2
move.l #2,d3
libcall Dos,Write
move.l filefh,d1
move.l mem6502,d2
move.l #MemSize,d3
libcall Dos,Write
move.l filefh,d1
libcall Dos,Close
rts
;==========================================================================
menutrace btst.b #0,traceonoff ;turn the trace function on and off
beq .notrace
tst.l tracefh
bne gmsg
move.l #tracewin,d1
move.l #MODE_NEWFILE,d2
libcall Dos,Open
move.l d0,tracefh
bra gmsg
.notrace tst.l tracefh
beq gmsg
move.l tracefh,d1
libcall Dos,Close
clr.l tracefh
rts
;==========================================================================
menuedit rts
;==========================================================================
menusstep rts
;==========================================================================
getfilename move.l #reqname,d1 ;output :d0.l=namelen
move.l #MODE_NEWFILE,d2 ; error -> d0=0
libcall Dos,Open ;open request_window
move.l d0,reqfh
tst.l d0
ret eq
move.l reqfh,d1
move.l #namebuffer,d2
move.l #200,d3
libcall Dos,Read ;read name
push.l d0
lea namebuffer,a0
zloop move.b (a0),d0
cmp.b #$0a,d0 ;check for LF
bne.s nolf
move.b #0,(a0)
nolf cmp.b #0,(a0)+ ;check for ending zero
bne.s zloop
move.l reqfh,d1
libcall Dos,Close ;close window
pop.l d0
rts
;==========================================================================
hltolh ;input :d0.w
lhtohl move.w d0,d1 ;output :d0.l
rol.w #8,d1
clr.l d0 ;swaps the high and
move.w d1,d0 ;low bytes of a word
rts
;==========================================================================
getbyte move.w pc6502,d1 ;output :d0.b
bsr readadr
inc.w pc6502
rts
;==========================================================================
putstack clr.l d1 ;input :d0.b
move.b stack,d1
add.l mem6502,d1
move.l d1,a0
move.b d0,$100(a0)
dec.b stack
rts
;==========================================================================
getstack clr.l d1 ;output :d0.b
inc.b stack
move.b stack,d1
add.l mem6502,d1
move.l d1,a0
move.b $100(a0),d0
rts
;==========================================================================
testsign bclr #zero,status_reg ;input :d0.b
bclr #negative,status_reg
tst.b d0
bne.s .notz
bset #zero,status_reg
bra.s .notneg
.notz btst #7,d0
beq.s .notneg
bset #negative,status_reg
.notneg rts
;==========================================================================
getlast move.w pc6502,d1 ;output :d0.b
dec.w d1
bsr readadr
rts
;==========================================================================
branch bsr getadr
move.w d0,pc6502
rts
;==========================================================================
; Calculating the address
;==========================================================================
getadr move.b adrmode,d0 ;output :a0.l (68000 adr)
and.w #$ff,d0 ;output :d0.l (6502 adr)
lsl.w #3,d0 ;if acc. a0.l=0
lea adrmodes,a0
move.l (a0,d0.w),a1
jsr (a1)
rts
;==========================================================================
adrimp move.w #0,tracedata
rts
;==========================================================================
adrabs bsr getbyte ;absolute
push.w d0
bsr getbyte
move.b d0,d1
lsl.w #8,d1
pop.w d0
move.b d0,d1
bsr calcadr
move.w d1,tracedata
move.l d1,d0
rts
;==========================================================================
adrzero bsr getbyte ;zero
clr.w d1
move.b d0,d1
bsr calcadr
move.w d1,tracedata
move.l d1,d0
rts
;==========================================================================
adrimm move.w pc6502,-(sp) ;immediate
bsr getbyte
move.w (sp)+,d1
ext.w d0
move.w d0,tracedata
bsr calcadr
move.l d1,d0
rts
;==========================================================================
adrabsx bsr getbyte ;absolute,x
push.w d0
bsr getbyte
move.b d0,d1
lsl.w #8,d1
pop.w d0
move.b d0,d1
move.w d1,tracedata
clr.w d0
move.b x_reg,d0
add.w d0,d1
bsr calcadr
move.l d1,d0
rts
;==========================================================================
adrabsy bsr getbyte ;absolute,y
push.w d0
bsr getbyte
move.b d0,d1
lsl.w #8,d1
pop.w d0
move.b d0,d1
move.w d1,tracedata
clr.w d0
move.b y_reg,d0
add.w d0,d1
bsr calcadr
move.l d1,d0
rts
;==========================================================================
adrindx clr.l d0
bsr getbyte ;(indirect,x)
move.w d0,tracedata
add.b x_reg,d0
move.w d0,d1
bsr calcadr
move.w (a0),d0
bsr lhtohl
move.w d0,d1
bsr calcadr
move.l d1,d0
rts
;==========================================================================
adrindy bsr getbyte ;(indirect),y
clr.w d1
move.b d0,d1
move.w d1,tracedata
bsr calcadr
move.w (a0),d0
bsr lhtohl
clr.w d1
move.b y_reg,d1
add.w d0,d1
bsr calcadr
move.l d1,d0
rts
;==========================================================================
adrzerox bsr getbyte ;zero,x
clr.w d1
move.b d0,d1
move.w d1,tracedata
add.b x_reg,d0
bsr calcadr
move.l d1,d0
rts
;==========================================================================
adrzeroy bsr getbyte ;zero,y
clr.w d1
move.b d0,d1
move.w d1,tracedata
add.b y_reg,d0
clr.w d1
move.b d0,d1
bsr calcadr
move.l d1,d0
rts
;==========================================================================
adracc move.l #0,a0 ;accumulator
move.w #0,tracedata
move.l d1,d0
rts
;==========================================================================
adrind bsr getbyte ;(indirect)
push.w d0
bsr getbyte
move.b d0,d1
pop.w d0
lsl.w #8,d1
move.b d0,d1
move.w d1,tracedata
push.w d1
bsr readadr
pop.w d1
push.w d0
inc d1
bsr readadr
move.b d0,d1
lsl.w #8,d1
pop.w d0
move.b d0,d1
bsr calcadr
move.l d1,d0
rts
;==========================================================================
adrrel bsr getbyte
ext.w d0
move.w pc6502,d1
add.w d0,d1
move.w d1,tracedata
bsr calcadr
move.l d1,d0
rts
;==========================================================================
calcadr clr.l d0 ;input :d1.w (6502 adr)
move.w d1,d0 ;output :d0/a0 (68000 adr)
add.l mem6502,d0 ;d1.w unchanged
move.l d0,a0
rts
;==========================================================================
; Hardware-emulation
;==========================================================================
readadr move.w d1,d0 ;input :d1.w (6502 adr)
lsr.w #8,d1 ;output :d0.l
and.l #$ff,d1
lsl.l #2,d1
move.l #readpages,a0
move.l (a0,d1.l),a0
jmp (a0) ;d0.w = 6502adr
;rts from called routine
;==========================================================================
writeadr move.w d1,d2 ;input :d1.w (6502 adr)
lsr.w #8,d1 ;input :d0.b
and.l #$ff,d1
lsl.l #2,d1
move.l #writepages,a0
move.l (a0,d1.l),a0
move.b d0,d1 ;d1.b = data
move.w d2,d0 ;d0.w = 6502adr
jmp (a0) ;rts from called routine
;==========================================================================
read_normaladr and.l #$ffff,d0
move.l mem6502,a0
move.b (a0,d0.l),d0
rts
;==========================================================================
write_normaladr and.l #$ffff,d0
move.l mem6502,a0
move.b d1,(a0,d0.l)
rts
;==========================================================================
write_screenadr push.w d1
push.w d0
sub.w #ScreenBase,d0
and.l #$ffff,d0
cmp.w #Rows*Columns,d0
bge .notscreen
divu.w #Columns,d0
move.w d0,d1
swap d0
bsr Locate
move.w 2(sp),d0
bsr PrintChar
.notscreen pop.w d1
and.l #$ffff,d1
move.l d1,a0
add.l mem6502,a0
pop.w d0
move.b d0,(a0)
rts
;==========================================================================
read_ioadr cmp.b #1,d0
bne read_normaladr
and.l #$ffff,d0
move.l d0,a0
add.l mem6502,a0
move.b (a0),d0
move.b #0,(a0)
rts
;==========================================================================
write_ioadr cmp.b #1,d0
bne write_normaladr
rts
;==========================================================================
; This routine assumes that characters are 8x8 pixels big.
; Should be changed to account for different fonts.
; (Or code should explicitly ask for Topaz/8)
Locate and.l #$ffff,d0 ;input : x=d0.w
and.l #$ffff,d1 ;input : y=d1.w
lsl.w #3,d0
lsl.w #3,d1
add.w #$12,d1
addq.w #5,d0
move.l myRastPort,a1
libcall Gfx,Move
rts
;==========================================================================
PrintChar cmp.b #$20,d0 ;input : d0.b
blt.s .ctrl
move.b d0,temp
move.l myRastPort,a1
lea temp,a0
move.l #1,d0
libcall Gfx,Text
.ctrl rts
;==========================================================================
strlen move.l #-1,d0 ;input :a0=stradr
.loop inc.l d0 ;output :d0.l
move.b (a0)+,d1 ;doesn't count the
bne.s .loop ; ending zero
rts
;==========================================================================
copystr move.b (a0)+,d0 ;input :a0=source
move.b d0,(a1)+ ;input :a1=dest
bne.s copystr
rts
;==========================================================================
;support for the RawDoFmt exec-function
stuffchar move.b d0,(a3)+
rts
;==========================================================================
;6502-regs
;==========================================================================
a_reg dc.b 0
even
x_reg dc.b 0
even
y_reg dc.b 0
even
status_reg dc.b 0
even
pc6502 dc.w 0
stack dc.b 0
even
;==========================================================================
;Pointers, variables and structures
;==========================================================================
instr dc.b 0
adrmode dc.b 0
reqfh dc.l 0
filefh dc.l 0
mem6502 dc.l 0
temp dc.l 0
myRastPort dc.l 0
WinPtr dc.l 0
UserPort dc.l 0
oldsp dc.l 0
IntBase dc.l 0
GfxBase dc.l 0
DosBase dc.l 0
tracefh dc.l 0
tracewin dc.b 'con:290/0/320/200/Trace/Edit',0
even
reqname dc.b 'con:100/0/300/100/Enter filename',0
even
WinTitle dc.b '6502 emulator',0
even
IntName dc.b 'intuition.library',0
even
GfxName dc.b 'graphics.library',0
even
DosName dc.b 'dos.library',0
even
namebuffer dcb.b 200,0
;==========================================================================
tracesr dc.w 0
tracesp dc.w 0
traceacc dc.w 0
tracex dc.w 0
tracey dc.w 0
tracepc dc.w 0
tracedata dc.w 0
tracestr dc.b ' SR SP A X Y PC',$a
dc.b ' %02x %02x %02x %02x %02x %04x '
traceop dc.b ' '
traceadr dc.b ' ',0
even
traceoutput dcb.b 100,0
;==========================================================================
myNewWindow
mynw_LeftEdge dc.w 0
mynw_TopEdge dc.w 0
mynw_Width dc.w Columns*8+$18
mynw_Height dc.w Rows*8+$18
mynw_DetailPen dc.b -1
mynw_BlockPen dc.b -1
mynw_IDCMPFlags dc.l IDCMP_VANILLAKEY|IDCMP_CLOSEWINDOW|IDCMP_MENUPICK|IDCMP_INTUITICKS
mynw_Flags dc.l WFLG_DRAGBAR|WFLG_DEPTHGADGET|WFLG_CLOSEGADGET|WFLG_ACTIVATE|WFLG_NOCAREREFRESH|WFLG_SMART_REFRESH
mynw_FirstGadget dc.l 0
mynw_CheckMark dc.l 0
mynw_Title dc.l WinTitle
mynw_Screen dc.l 0
mynw_BitMap dc.l 0
mynw_MinWidth dc.w 0
mynw_MinHeight dc.w 0
mynw_MaxWidth dc.w 0
mynw_MaxHeight dc.w 0
mynw_Type dc.w WBENCHSCREEN
;==========================================================================
; menu structures
;==========================================================================
menuname0 dc.b 'Project ',0
even
menu0 dc.l 0
dc.w 0,0,100,0
dc.w 1
dc.l menuname0
dc.l item00
dcb.w 4,0
;==========================================================================
item00 dc.l item01
dc.w 0,0,100,9
dc.w $40|$10|$2|$4
dc.l 0
dc.l itext0
dc.l 0
dc.b 'L'
dc.b 0
dc.l 0
dc.w 0
item01 dc.l item02
dc.w 0,10,100,9
dc.w $40|$14|$2|$4
dc.l 0
dc.l itext1
dc.l 0
dc.b 'S'
dc.b 0
dc.l 0
dc.w 0
item02 dc.l item03
dc.w 0,20,100,9
traceonoff dc.w $40|$10|$2|$1|$8|$4
dc.l 0
dc.l itext2
dc.l 0
dc.b 'T'
dc.b 0
dc.l 0
dc.w 0
item03 dc.l item04
dc.w 0,30,100,9
dc.w $40|$10|$2|$4
dc.l 0
dc.l itext3
dc.l 0
dc.b 'Q'
dc.b 0
dc.l 0
dc.w 0
item04 dc.l item05
dc.w 0,40,100,9
dc.w $40|$10|$2|$4
dc.l 0
dc.l itext4
dc.l 0
dc.b 'E'
dc.b 0
dc.l 0
dc.w 0
item05 dc.l 0
dc.w 0,50,200,9
dc.w $40|$10|$2|$4
dc.l 0
dc.l itext5
dc.l 0
dc.b 'W'
dc.b 0
dc.l 0
dc.w 0
;==========================================================================
itext0 dc.b 2,1
dc.b 1
dc.b 0
dc.w 0,0
dc.l 0
dc.l text0
dc.l 0
itext1 dc.b 2,1
dc.b 1
dc.b 0
dc.w 0,0
dc.l 0
dc.l text1
dc.l 0
itext2 dc.b 2,1
dc.b 1
dc.b 0
dc.w 20,0
dc.l 0
dc.l text2
dc.l 0
itext3 dc.b 2,1
dc.b 1
dc.b 0
dc.w 0,0
dc.l 0
dc.l text3
dc.l 0
itext4 dc.b 2,1
dc.b 1
dc.b 0
dc.w 0,0
dc.l 0
dc.l text4
dc.l 0
itext5 dc.b 2,1
dc.b 1
dc.b 0
dc.w 0,0
dc.l 0
dc.l text5
dc.l 0
;==========================================================================
text0 dc.b 'Load ',0
even
text1 dc.b 'Save ',0
even
text2 dc.b 'Trace ',0
even
text3 dc.b 'Quit ',0
even
text4 dc.b 'Edit ',0
even
text5 dc.b 'Single-step ',0
even
;==========================================================================
menutable
dc.b 0,0
dc.l menuload
dc.b 0,1
dc.l menusave
dc.b 0,2
dc.l menutrace
dc.b 0,3
dc.l Cleanup
dc.b 0,4
dc.l menuedit
dc.b 0,5
dc.l menusstep
dc.b -1,-1
dc.l 0
;==========================================================================
;Jumptables
;==========================================================================
readpages dc.l read_normaladr ;0
dc.l read_normaladr ;1
dc.l read_normaladr ;2
dc.l read_normaladr ;3
dc.l read_normaladr ;4
dc.l read_normaladr ;5
dc.l read_normaladr ;6
dc.l read_normaladr ;7
dc.l read_normaladr ;8
dc.l read_normaladr ;9
dc.l read_normaladr ;a
dc.l read_normaladr ;b
dc.l read_normaladr ;c
dc.l read_normaladr ;d
dc.l read_normaladr ;e
dc.l read_normaladr ;f
dc.l read_normaladr ;10
dc.l read_normaladr ;11
dc.l read_normaladr ;12
dc.l read_normaladr ;13
dc.l read_normaladr ;14
dc.l read_normaladr ;15
dc.l read_normaladr ;16
dc.l read_normaladr ;17
dc.l read_normaladr ;18
dc.l read_normaladr ;19
dc.l read_normaladr ;1a
dc.l read_normaladr ;1b
dc.l read_normaladr ;1c
dc.l read_normaladr ;1d
dc.l read_normaladr ;1e
dc.l read_normaladr ;1f
dc.l read_normaladr ;20
dc.l read_normaladr ;21
dc.l read_normaladr ;22
dc.l read_normaladr ;23
dc.l read_normaladr ;24
dc.l read_normaladr ;25
dc.l read_normaladr ;26
dc.l read_normaladr ;27
dc.l read_normaladr ;28
dc.l read_normaladr ;29
dc.l read_normaladr ;2a
dc.l read_normaladr ;2b
dc.l read_normaladr ;2c
dc.l read_normaladr ;2d
dc.l read_normaladr ;2e
dc.l read_normaladr ;2f
dc.l read_normaladr ;30
dc.l read_normaladr ;31
dc.l read_normaladr ;32
dc.l read_normaladr ;33
dc.l read_normaladr ;34
dc.l read_normaladr ;35
dc.l read_normaladr ;36
dc.l read_normaladr ;37
dc.l read_normaladr ;38
dc.l read_normaladr ;39
dc.l read_normaladr ;3a
dc.l read_normaladr ;3b
dc.l read_normaladr ;3c
dc.l read_normaladr ;3d
dc.l read_normaladr ;3e
dc.l read_normaladr ;3f
dc.l read_normaladr ;40
dc.l read_normaladr ;41
dc.l read_normaladr ;42
dc.l read_normaladr ;43
dc.l read_normaladr ;44
dc.l read_normaladr ;45
dc.l read_normaladr ;46
dc.l read_normaladr ;47
dc.l read_normaladr ;48
dc.l read_normaladr ;49
dc.l read_normaladr ;4a
dc.l read_normaladr ;4b
dc.l read_normaladr ;4c
dc.l read_normaladr ;4d
dc.l read_normaladr ;4e
dc.l read_normaladr ;4f
dc.l read_normaladr ;50
dc.l read_normaladr ;51
dc.l read_normaladr ;52
dc.l read_normaladr ;53
dc.l read_normaladr ;54
dc.l read_normaladr ;55
dc.l read_normaladr ;56
dc.l read_normaladr ;57
dc.l read_normaladr ;58
dc.l read_normaladr ;59
dc.l read_normaladr ;5a
dc.l read_normaladr ;5b
dc.l read_normaladr ;5c
dc.l read_normaladr ;5d
dc.l read_normaladr ;5e
dc.l read_normaladr ;5f
dc.l read_normaladr ;60
dc.l read_normaladr ;61
dc.l read_normaladr ;62
dc.l read_normaladr ;63
dc.l read_normaladr ;64
dc.l read_normaladr ;65
dc.l read_normaladr ;66
dc.l read_normaladr ;67
dc.l read_normaladr ;68
dc.l read_normaladr ;69
dc.l read_normaladr ;6a
dc.l read_normaladr ;6b
dc.l read_normaladr ;6c
dc.l read_normaladr ;6d
dc.l read_normaladr ;6e
dc.l read_normaladr ;6f
dc.l read_normaladr ;70
dc.l read_normaladr ;71
dc.l read_normaladr ;72
dc.l read_normaladr ;73
dc.l read_normaladr ;74
dc.l read_normaladr ;75
dc.l read_normaladr ;76
dc.l read_normaladr ;77
dc.l read_normaladr ;78
dc.l read_normaladr ;79
dc.l read_normaladr ;7a
dc.l read_normaladr ;7b
dc.l read_normaladr ;7c
dc.l read_normaladr ;7d
dc.l read_normaladr ;7e
dc.l read_normaladr ;7f
dc.l read_normaladr ;80
dc.l read_normaladr ;81
dc.l read_normaladr ;82
dc.l read_normaladr ;83
dc.l read_normaladr ;84
dc.l read_normaladr ;85
dc.l read_normaladr ;86
dc.l read_normaladr ;87
dc.l read_normaladr ;88
dc.l read_normaladr ;89
dc.l read_normaladr ;8a
dc.l read_normaladr ;8b
dc.l read_normaladr ;8c
dc.l read_normaladr ;8d
dc.l read_normaladr ;8e
dc.l read_normaladr ;8f
dc.l read_normaladr ;90
dc.l read_normaladr ;91
dc.l read_normaladr ;92
dc.l read_normaladr ;93
dc.l read_normaladr ;94
dc.l read_normaladr ;95
dc.l read_normaladr ;96
dc.l read_normaladr ;97
dc.l read_normaladr ;98
dc.l read_normaladr ;99
dc.l read_normaladr ;9a
dc.l read_normaladr ;9b
dc.l read_normaladr ;9c
dc.l read_normaladr ;9d
dc.l read_normaladr ;9e
dc.l read_normaladr ;9f
dc.l read_normaladr ;a0
dc.l read_normaladr ;a1
dc.l read_normaladr ;a2
dc.l read_normaladr ;a3
dc.l read_normaladr ;a4
dc.l read_normaladr ;a5
dc.l read_normaladr ;a6
dc.l read_normaladr ;a7
dc.l read_normaladr ;a8
dc.l read_normaladr ;a9
dc.l read_normaladr ;aa
dc.l read_normaladr ;ab
dc.l read_normaladr ;ac
dc.l read_normaladr ;ad
dc.l read_normaladr ;ae
dc.l read_normaladr ;af
dc.l read_normaladr ;b0
dc.l read_normaladr ;b1
dc.l read_normaladr ;b2
dc.l read_normaladr ;b3
dc.l read_normaladr ;b4
dc.l read_normaladr ;b5
dc.l read_normaladr ;b6
dc.l read_normaladr ;b7
dc.l read_normaladr ;b8
dc.l read_normaladr ;b9
dc.l read_normaladr ;ba
dc.l read_normaladr ;bb
dc.l read_normaladr ;bc
dc.l read_normaladr ;bd
dc.l read_normaladr ;be
dc.l read_normaladr ;bf
dc.l read_normaladr ;c0
dc.l read_normaladr ;c1
dc.l read_normaladr ;c2
dc.l read_normaladr ;c3
dc.l read_normaladr ;c4
dc.l read_normaladr ;c5
dc.l read_normaladr ;c6
dc.l read_normaladr ;c7
dc.l read_normaladr ;c8
dc.l read_normaladr ;c9
dc.l read_normaladr ;ca
dc.l read_normaladr ;cb
dc.l read_normaladr ;cc
dc.l read_normaladr ;cd
dc.l read_normaladr ;ce
dc.l read_normaladr ;cf
dc.l read_normaladr ;d0
dc.l read_normaladr ;d1
dc.l read_normaladr ;d2
dc.l read_normaladr ;d3
dc.l read_normaladr ;d4
dc.l read_normaladr ;d5
dc.l read_normaladr ;d6
dc.l read_normaladr ;d7
dc.l read_normaladr ;d8
dc.l read_normaladr ;d9
dc.l read_normaladr ;da
dc.l read_normaladr ;db
dc.l read_ioadr ;dc
dc.l read_normaladr ;dd
dc.l read_normaladr ;de
dc.l read_normaladr ;df
dc.l read_normaladr ;e0
dc.l read_normaladr ;e1
dc.l read_normaladr ;e2
dc.l read_normaladr ;e3
dc.l read_normaladr ;e4
dc.l read_normaladr ;e5
dc.l read_normaladr ;e6
dc.l read_normaladr ;e7
dc.l read_normaladr ;e8
dc.l read_normaladr ;e9
dc.l read_normaladr ;ea
dc.l read_normaladr ;eb
dc.l read_normaladr ;ec
dc.l read_normaladr ;ed
dc.l read_normaladr ;ee
dc.l read_normaladr ;ef
dc.l read_normaladr ;f0
dc.l read_normaladr ;f1
dc.l read_normaladr ;f2
dc.l read_normaladr ;f3
dc.l read_normaladr ;f4
dc.l read_normaladr ;f5
dc.l read_normaladr ;f6
dc.l read_normaladr ;f7
dc.l read_normaladr ;f8
dc.l read_normaladr ;f9
dc.l read_normaladr ;fa
dc.l read_normaladr ;fb
dc.l read_normaladr ;fc
dc.l read_normaladr ;fd
dc.l read_normaladr ;fe
dc.l read_normaladr ;ff
writepages dc.l write_normaladr ;0
dc.l write_normaladr ;1
dc.l write_normaladr ;2
dc.l write_normaladr ;3
dc.l write_screenadr ;4
dc.l write_screenadr ;5
dc.l write_screenadr ;6
dc.l write_screenadr ;7
dc.l write_normaladr ;8
dc.l write_normaladr ;9
dc.l write_normaladr ;a
dc.l write_normaladr ;b
dc.l write_normaladr ;c
dc.l write_normaladr ;d
dc.l write_normaladr ;e
dc.l write_normaladr ;f
dc.l write_normaladr ;10
dc.l write_normaladr ;11
dc.l write_normaladr ;12
dc.l write_normaladr ;13
dc.l write_normaladr ;14
dc.l write_normaladr ;15
dc.l write_normaladr ;16
dc.l write_normaladr ;17
dc.l write_normaladr ;18
dc.l write_normaladr ;19
dc.l write_normaladr ;1a
dc.l write_normaladr ;1b
dc.l write_normaladr ;1c
dc.l write_normaladr ;1d
dc.l write_normaladr ;1e
dc.l write_normaladr ;1f
dc.l write_normaladr ;20
dc.l write_normaladr ;21
dc.l write_normaladr ;22
dc.l write_normaladr ;23
dc.l write_normaladr ;24
dc.l write_normaladr ;25
dc.l write_normaladr ;26
dc.l write_normaladr ;27
dc.l write_normaladr ;28
dc.l write_normaladr ;29
dc.l write_normaladr ;2a
dc.l write_normaladr ;2b
dc.l write_normaladr ;2c
dc.l write_normaladr ;2d
dc.l write_normaladr ;2e
dc.l write_normaladr ;2f
dc.l write_normaladr ;30
dc.l write_normaladr ;31
dc.l write_normaladr ;32
dc.l write_normaladr ;33
dc.l write_normaladr ;34
dc.l write_normaladr ;35
dc.l write_normaladr ;36
dc.l write_normaladr ;37
dc.l write_normaladr ;38
dc.l write_normaladr ;39
dc.l write_normaladr ;3a
dc.l write_normaladr ;3b
dc.l write_normaladr ;3c
dc.l write_normaladr ;3d
dc.l write_normaladr ;3e
dc.l write_normaladr ;3f
dc.l write_normaladr ;40
dc.l write_normaladr ;41
dc.l write_normaladr ;42
dc.l write_normaladr ;43
dc.l write_normaladr ;44
dc.l write_normaladr ;45
dc.l write_normaladr ;46
dc.l write_normaladr ;47
dc.l write_normaladr ;48
dc.l write_normaladr ;49
dc.l write_normaladr ;4a
dc.l write_normaladr ;4b
dc.l write_normaladr ;4c
dc.l write_normaladr ;4d
dc.l write_normaladr ;4e
dc.l write_normaladr ;4f
dc.l write_normaladr ;50
dc.l write_normaladr ;51
dc.l write_normaladr ;52
dc.l write_normaladr ;53
dc.l write_normaladr ;54
dc.l write_normaladr ;55
dc.l write_normaladr ;56
dc.l write_normaladr ;57
dc.l write_normaladr ;58
dc.l write_normaladr ;59
dc.l write_normaladr ;5a
dc.l write_normaladr ;5b
dc.l write_normaladr ;5c
dc.l write_normaladr ;5d
dc.l write_normaladr ;5e
dc.l write_normaladr ;5f
dc.l write_normaladr ;60
dc.l write_normaladr ;61
dc.l write_normaladr ;62
dc.l write_normaladr ;63
dc.l write_normaladr ;64
dc.l write_normaladr ;65
dc.l write_normaladr ;66
dc.l write_normaladr ;67
dc.l write_normaladr ;68
dc.l write_normaladr ;69
dc.l write_normaladr ;6a
dc.l write_normaladr ;6b
dc.l write_normaladr ;6c
dc.l write_normaladr ;6d
dc.l write_normaladr ;6e
dc.l write_normaladr ;6f
dc.l write_normaladr ;70
dc.l write_normaladr ;71
dc.l write_normaladr ;72
dc.l write_normaladr ;73
dc.l write_normaladr ;74
dc.l write_normaladr ;75
dc.l write_normaladr ;76
dc.l write_normaladr ;77
dc.l write_normaladr ;78
dc.l write_normaladr ;79
dc.l write_normaladr ;7a
dc.l write_normaladr ;7b
dc.l write_normaladr ;7c
dc.l write_normaladr ;7d
dc.l write_normaladr ;7e
dc.l write_normaladr ;7f
dc.l write_normaladr ;80
dc.l write_normaladr ;81
dc.l write_normaladr ;82
dc.l write_normaladr ;83
dc.l write_normaladr ;84
dc.l write_normaladr ;85
dc.l write_normaladr ;86
dc.l write_normaladr ;87
dc.l write_normaladr ;88
dc.l write_normaladr ;89
dc.l write_normaladr ;8a
dc.l write_normaladr ;8b
dc.l write_normaladr ;8c
dc.l write_normaladr ;8d
dc.l write_normaladr ;8e
dc.l write_normaladr ;8f
dc.l write_normaladr ;90
dc.l write_normaladr ;91
dc.l write_normaladr ;92
dc.l write_normaladr ;93
dc.l write_normaladr ;94
dc.l write_normaladr ;95
dc.l write_normaladr ;96
dc.l write_normaladr ;97
dc.l write_normaladr ;98
dc.l write_normaladr ;99
dc.l write_normaladr ;9a
dc.l write_normaladr ;9b
dc.l write_normaladr ;9c
dc.l write_normaladr ;9d
dc.l write_normaladr ;9e
dc.l write_normaladr ;9f
dc.l write_normaladr ;a0
dc.l write_normaladr ;a1
dc.l write_normaladr ;a2
dc.l write_normaladr ;a3
dc.l write_normaladr ;a4
dc.l write_normaladr ;a5
dc.l write_normaladr ;a6
dc.l write_normaladr ;a7
dc.l write_normaladr ;a8
dc.l write_normaladr ;a9
dc.l write_normaladr ;aa
dc.l write_normaladr ;ab
dc.l write_normaladr ;ac
dc.l write_normaladr ;ad
dc.l write_normaladr ;ae
dc.l write_normaladr ;af
dc.l write_normaladr ;b0
dc.l write_normaladr ;b1
dc.l write_normaladr ;b2
dc.l write_normaladr ;b3
dc.l write_normaladr ;b4
dc.l write_normaladr ;b5
dc.l write_normaladr ;b6
dc.l write_normaladr ;b7
dc.l write_normaladr ;b8
dc.l write_normaladr ;b9
dc.l write_normaladr ;ba
dc.l write_normaladr ;bb
dc.l write_normaladr ;bc
dc.l write_normaladr ;bd
dc.l write_normaladr ;be
dc.l write_normaladr ;bf
dc.l write_normaladr ;c0
dc.l write_normaladr ;c1
dc.l write_normaladr ;c2
dc.l write_normaladr ;c3
dc.l write_normaladr ;c4
dc.l write_normaladr ;c5
dc.l write_normaladr ;c6
dc.l write_normaladr ;c7
dc.l write_normaladr ;c8
dc.l write_normaladr ;c9
dc.l write_normaladr ;ca
dc.l write_normaladr ;cb
dc.l write_normaladr ;cc
dc.l write_normaladr ;cd
dc.l write_normaladr ;ce
dc.l write_normaladr ;cf
dc.l write_normaladr ;d0
dc.l write_normaladr ;d1
dc.l write_normaladr ;d2
dc.l write_normaladr ;d3
dc.l write_normaladr ;d4
dc.l write_normaladr ;d5
dc.l write_normaladr ;d6
dc.l write_normaladr ;d7
dc.l write_normaladr ;d8
dc.l write_normaladr ;d9
dc.l write_normaladr ;da
dc.l write_normaladr ;db
dc.l write_ioadr ;dc
dc.l write_normaladr ;dd
dc.l write_normaladr ;de
dc.l write_normaladr ;df
dc.l write_normaladr ;e0
dc.l write_normaladr ;e1
dc.l write_normaladr ;e2
dc.l write_normaladr ;e3
dc.l write_normaladr ;e4
dc.l write_normaladr ;e5
dc.l write_normaladr ;e6
dc.l write_normaladr ;e7
dc.l write_normaladr ;e8
dc.l write_normaladr ;e9
dc.l write_normaladr ;ea
dc.l write_normaladr ;eb
dc.l write_normaladr ;ec
dc.l write_normaladr ;ed
dc.l write_normaladr ;ee
dc.l write_normaladr ;ef
dc.l write_normaladr ;f0
dc.l write_normaladr ;f1
dc.l write_normaladr ;f2
dc.l write_normaladr ;f3
dc.l write_normaladr ;f4
dc.l write_normaladr ;f5
dc.l write_normaladr ;f6
dc.l write_normaladr ;f7
dc.l write_normaladr ;f8
dc.l write_normaladr ;f9
dc.l write_normaladr ;fa
dc.l write_normaladr ;fb
dc.l write_normaladr ;fc
dc.l write_normaladr ;fd
dc.l write_normaladr ;fe
dc.l write_normaladr ;ff
;format of word is: 1st byte=operation,2nd byte=addressing mode
optable dc.w $0b00 ;00 brk
dc.w $230a ;01 ora (,x)
dc.w $3f00 ;02 jam
dc.w $4b0a ;03 slo (,x)
dc.w $2204 ;04 nop z
dc.w $2304 ;05 ora z
dc.w $0304 ;06 asl z
dc.w $4b04 ;07 slo z
dc.w $2500 ;08 php
dc.w $2302 ;09 ora #
dc.w $0301 ;0a asl a
dc.w $3902 ;0b anc #
dc.w $2207 ;0c nop xx
dc.w $2307 ;0d ora xx
dc.w $0307 ;0e asl xx
dc.w $4b07 ;0f slo xx
dc.w $0a03 ;10 bpl
dc.w $230b ;11 ora (),y
dc.w $3f00 ;12 jam
dc.w $4b0b ;13 slo (),y
dc.w $2205 ;14 nop z,x
dc.w $2305 ;15 ora z,x
dc.w $0305 ;16 asl z,x
dc.w $4b05 ;17 slo z,x
dc.w $0e00 ;18 clc
dc.w $2309 ;19 ora xx,y
dc.w $2200 ;1a nop ??????
dc.w $4b09 ;1b slo xx,y
dc.w $2208 ;1c nop xx,x
dc.w $2308 ;1d ora xx,x
dc.w $0308 ;1e asl xx,x
dc.w $4b08 ;1f slo xx,x
dc.w $1d07 ;20 jsr
dc.w $020a ;21 and (,x)
dc.w $3f00 ;22 jam
dc.w $430a ;23 rla (,x)
dc.w $0704 ;24 bit z
dc.w $0204 ;25 and z
dc.w $2804 ;26 rol z
dc.w $4304 ;27 rla z
dc.w $2700 ;28 plp
dc.w $0202 ;29 and #
dc.w $2801 ;2a rol a
dc.w $3902 ;2b anc #
dc.w $0707 ;2c bit xx
dc.w $0207 ;2d and xx
dc.w $2807 ;2e rol xx
dc.w $4307 ;2f rla xx
dc.w $0803 ;30 bmi
dc.w $020b ;31 and (),y
dc.w $3f00 ;32 jam
dc.w $430b ;33 rla (),y
dc.w $2205 ;34 nop z,x
dc.w $0205 ;35 and z,x
dc.w $2805 ;36 rol z,x
dc.w $4305 ;37 rla z,x
dc.w $2d00 ;38 sec
dc.w $0205 ;39 and xx,y
dc.w $2200 ;3a nop
dc.w $4305 ;3b rla xx,y
dc.w $2208 ;3c nop xx,x
dc.w $0208 ;3d and xx,x
dc.w $2808 ;3e rol xx,x
dc.w $4308 ;3f rla xx,x
dc.w $2a00 ;40 rti
dc.w $180a ;41 eor (,x)
dc.w $3f00 ;42 jam
dc.w $4c0a ;43 sre (,x)
dc.w $2204 ;44 nop z
dc.w $1804 ;45 eor z
dc.w $2104 ;46 lsr z
dc.w $4c04 ;47 sre z
dc.w $2400 ;48 pha
dc.w $1802 ;49 eor #
dc.w $2101 ;4a lsr a
dc.w $3c02 ;4b asr #
dc.w $1c07 ;4c jmp xx
dc.w $1807 ;4d eor xx
dc.w $2107 ;4e lsr xx
dc.w $4c07 ;4f sre xx
dc.w $0c03 ;50 bvc
dc.w $180b ;51 eor (),y
dc.w $3f00 ;52 jam
dc.w $4c0b ;53 sre (),y
dc.w $2205 ;54 nop z,x
dc.w $1805 ;55 eor z,x
dc.w $2105 ;56 lsr z,x
dc.w $4c05 ;57 sre z,x
dc.w $1000 ;58 cli
dc.w $1809 ;59 eor xx,y
dc.w $2200 ;5a nop
dc.w $4c09 ;5b sre xx,y
dc.w $2208 ;5c nop xx,x
dc.w $1808 ;5d eor xx,x
dc.w $2108 ;5e lsr xx,x
dc.w $4c08 ;5f sre xx,x
dc.w $2b00 ;60 rts
dc.w $010a ;61 adc (,x)
dc.w $3f00 ;62 jam
dc.w $440a ;63 rra (,x)
dc.w $2200 ;64 nop z
dc.w $0104 ;65 adc z
dc.w $2904 ;66 ror z
dc.w $4404 ;67 rra z
dc.w $2600 ;68 pla
dc.w $0102 ;69 adc #
dc.w $2901 ;6a ror a
dc.w $3b02 ;6b arr #
dc.w $1c0c ;6c jmp ()
dc.w $0107 ;6d adc xx
dc.w $2907 ;6e ror xx
dc.w $4407 ;6f rra xx
dc.w $0d03 ;70 bvs
dc.w $010b ;71 adc (),y
dc.w $3f00 ;72 jam
dc.w $440b ;73 rra (),y
dc.w $2205 ;74 nop z,x
dc.w $0105 ;75 adc z,x
dc.w $2905 ;76 ror z,x
dc.w $4405 ;77 rra z,x
dc.w $2f00 ;78 sei
dc.w $0109 ;79 adc xx,y
dc.w $2200 ;7a nop
dc.w $4409 ;7b rra xx,y
dc.w $2208 ;7c nop xx,x
dc.w $0108 ;7d adc xx,x
dc.w $2908 ;7e ror xx,x
dc.w $4408 ;7f rra xx,x
dc.w $2202 ;80 nop #
dc.w $300a ;81 sta (,x)
dc.w $2202 ;82 nop #
dc.w $450a ;83 sax (,x)
dc.w $3204 ;84 sty z
dc.w $3004 ;85 sta z
dc.w $3104 ;86 stx z
dc.w $4504 ;87 sax z
dc.w $1700 ;88 dey
dc.w $2202 ;89 nop #
dc.w $3600 ;8a txa
dc.w $3a02 ;8b ane #
dc.w $3207 ;8c sty xx
dc.w $3007 ;8d sta xx
dc.w $3107 ;8e stx xx
dc.w $4507 ;8f sax xx
dc.w $0403 ;90 bcc
dc.w $300b ;91 sta (),y
dc.w $3f00 ;92 jam
dc.w $4708 ;93 sha xx,x
dc.w $3205 ;94 sty z,x
dc.w $3005 ;95 sta z,x
dc.w $3106 ;96 stx z,y
dc.w $4506 ;97 sax z,y
dc.w $3800 ;98 tya
dc.w $3009 ;99 sta xx,y
dc.w $3700 ;9a txs
dc.w $4809 ;9b shs xx,y
dc.w $4a09 ;9c shy xx,y
dc.w $3008 ;9d sta xx,x
dc.w $4908 ;9e shx xx,x
dc.w $4709 ;9f sha xx,y
dc.w $2002 ;a0 ldy #
dc.w $1e0a ;a1 lda (,x)
dc.w $1f02 ;a2 ldx #
dc.w $410a ;a3 lax (,x)
dc.w $2004 ;a4 ldy z
dc.w $1e04 ;a5 lda z
dc.w $1f04 ;a6 ldx z
dc.w $4104 ;a7 lax z
dc.w $3400 ;a8 tay
dc.w $1e02 ;a9 lda #
dc.w $3300 ;aa tax
dc.w $4202 ;ab lxa #
dc.w $2007 ;ac ldy xx
dc.w $1e07 ;ad lda xx
dc.w $1f07 ;ae ldx xx
dc.w $4107 ;af lax xx
dc.w $0503 ;b0 bcs
dc.w $1e0b ;b1 lda (),y
dc.w $3f00 ;b2 jam
dc.w $410b ;b3 lax (),y
dc.w $2005 ;b4 ldy z,x
dc.w $1e05 ;b5 lda z,x
dc.w $1f06 ;b6 ldx z,y
dc.w $4106 ;b7 lax z,y
dc.w $1100 ;b8 clv
dc.w $2009 ;b9 lda xx,y
dc.w $3500 ;ba tsx
dc.w $4009 ;bb lae xx,y
dc.w $2008 ;bc ldy xx,x
dc.w $1e08 ;bd lda xx,x
dc.w $1f09 ;be ldx xx,y
dc.w $4109 ;bf lax xx,y
dc.w $1402 ;c0 cpy #
dc.w $120a ;c1 cmp (,x)
dc.w $2202 ;c2 nop #
dc.w $3d0a ;c3 dcp (,x)
dc.w $1404 ;c4 cpy z
dc.w $1204 ;c5 cmp z
dc.w $1504 ;c6 dec z
dc.w $3d04 ;c7 dcp z
dc.w $1b00 ;c8 iny
dc.w $1202 ;c9 cmp #
dc.w $1600 ;ca dex
dc.w $4602 ;cb sbx #
dc.w $1407 ;cc cpy xx
dc.w $1207 ;cd cmp xx
dc.w $1507 ;ce dec xx
dc.w $3d07 ;cf dcp xx
dc.w $0903 ;d0 bne
dc.w $120b ;d1 cmp (),y
dc.w $3f00 ;d2 jam
dc.w $3d0b ;d3 dcp (),y
dc.w $2206 ;d4 nop z,x
dc.w $1205 ;d5 cmp z,x
dc.w $1505 ;d6 dec z,x
dc.w $3d05 ;d7 dcp z,x
dc.w $0f00 ;d8 cld
dc.w $1209 ;d9 cmp xx,y
dc.w $2200 ;da nop
dc.w $3d09 ;db dcp xx,y
dc.w $2208 ;dc nop xx,x
dc.w $1208 ;dd cmp xx,x
dc.w $1508 ;de dec xx,x
dc.w $3d08 ;df dcp xx,x
dc.w $1302 ;e0 cpx #
dc.w $2c0a ;e1 sbc (,x)
dc.w $2202 ;e2 nop #
dc.w $3e0a ;e3 isb (,x)
dc.w $1304 ;e4 cpx z
dc.w $2c04 ;e5 sbc z
dc.w $1904 ;e6 inc z
dc.w $3e04 ;e7 isb z
dc.w $1a00 ;e8 inx
dc.w $2c02 ;e9 sbc #
dc.w $2200 ;ea nop
dc.w $2c02 ;eb sbc #
dc.w $1307 ;ec cpx xx
dc.w $2c07 ;ed sbc xx
dc.w $1907 ;ee inc xx
dc.w $3e07 ;ef isb xx
dc.w $0603 ;f0 beq
dc.w $2c0b ;f1 sbc (),y
dc.w $3f00 ;f2 jam
dc.w $3e0b ;f3 isb (),y
dc.w $2205 ;f4 nop z,x
dc.w $2c05 ;f5 sbc z,x
dc.w $1905 ;f6 inc z,x
dc.w $3e05 ;f7 isb z,x
dc.w $2e00 ;f8 sed
dc.w $2c09 ;f9 sbc xx,y
dc.w $2200 ;fa nop
dc.w $3e09 ;fb isb xx,y
dc.w $2208 ;fc nop xx,x
dc.w $2c08 ;fd sbc xx,x
dc.w $1908 ;fe inc xx,x
dc.w $3e08 ;ff isb xx,x
;==========================================================================
instructions dc.l illegal65 ;00
dc.l adc65 ;01
dc.l and65 ;02
dc.l asl65 ;03
dc.l bcc65 ;04
dc.l bcs65 ;05
dc.l beq65 ;06
dc.l bit65 ;07
dc.l bmi65 ;08
dc.l bne65 ;09
dc.l bpl65 ;0a
dc.l brk65 ;0b
dc.l bvc65 ;0c
dc.l bvs65 ;0d
dc.l clc65 ;0e
dc.l cld65 ;0f
dc.l cli65 ;10
dc.l clv65 ;11
dc.l cmp65 ;12
dc.l cpx65 ;13
dc.l cpy65 ;14
dc.l dec65 ;15
dc.l dex65 ;16
dc.l dey65 ;17
dc.l eor65 ;18
dc.l inc65 ;19
dc.l inx65 ;1a
dc.l iny65 ;1b
dc.l jmp65 ;1c
dc.l jsr65 ;1d
dc.l lda65 ;1e
dc.l ldx65 ;1f
dc.l ldy65 ;20
dc.l lsr65 ;21
dc.l nop65 ;22
dc.l ora65 ;23
dc.l pha65 ;24
dc.l php65 ;25
dc.l pla65 ;26
dc.l plp65 ;27
dc.l rol65 ;28
dc.l ror65 ;29
dc.l rti65 ;2a
dc.l rts65 ;2b
dc.l sbc65 ;2c
dc.l sec65 ;2d
dc.l sed65 ;2e
dc.l sei65 ;2f
dc.l sta65 ;30
dc.l stx65 ;31
dc.l sty65 ;32
dc.l tax65 ;33
dc.l tay65 ;34
dc.l tsx65 ;35
dc.l txa65 ;36
dc.l txs65 ;37
dc.l tya65 ;38
; The following instructions are undocumented
dc.l anc65 ;39
dc.l ane65 ;3a
dc.l arr65 ;3b
dc.l asr65 ;3c
dc.l dcp65 ;3d
dc.l isb65 ;3e
dc.l jam65 ;3f
dc.l lae65 ;40
dc.l lax65 ;41
dc.l lxa65 ;42
dc.l rla65 ;43
dc.l rra65 ;44
dc.l sax65 ;45
dc.l sbx65 ;46
dc.l sha65 ;47
dc.l shs65 ;48
dc.l shx65 ;49
dc.l shy65 ;4a
dc.l slo65 ;4b
dc.l sre65 ;4c
;==========================================================================
adrmodes dc.l adrimp ;00
dc.l impstr
dc.l adracc ;01
dc.l accstr
dc.l adrimm ;02
dc.l immstr
dc.l adrrel ;03
dc.l relstr
dc.l adrzero ;04
dc.l zerostr
dc.l adrzerox ;05
dc.l zeroxstr
dc.l adrzeroy ;06
dc.l zeroystr
dc.l adrabs ;07
dc.l absstr
dc.l adrabsx ;08
dc.l absxstr
dc.l adrabsy ;09
dc.l absystr
dc.l adrindx ;0a
dc.l indxstr
dc.l adrindy ;0b
dc.l indystr
dc.l adrind ;0c
dc.l indstr
;==========================================================================
;for tracing
opstrings dc.b '??? ' ;00
dc.b 'ADC ' ;01
dc.b 'AND ' ;02
dc.b 'ASL ' ;03
dc.b 'BCC ' ;04
dc.b 'BCS ' ;05
dc.b 'BEQ ' ;06
dc.b 'BIT ' ;07
dc.b 'BMI ' ;08
dc.b 'BNE ' ;09
dc.b 'BPL ' ;0A
dc.b 'BRK ' ;0B
dc.b 'BVC ' ;0C
dc.b 'BVS ' ;0D
dc.b 'CLC ' ;0E
dc.b 'CLD ' ;0F
dc.b 'CLI ' ;10
dc.b 'CLV ' ;11
dc.b 'CMP ' ;12
dc.b 'CPX ' ;13
dc.b 'CPY ' ;14
dc.b 'DEC ' ;15
dc.b 'DEX ' ;16
dc.b 'DEY ' ;17
dc.b 'EOR ' ;18
dc.b 'INC ' ;19
dc.b 'INX ' ;1A
dc.b 'INY ' ;1B
dc.b 'JMP ' ;1C
dc.b 'JSR ' ;1D
dc.b 'LDA ' ;1E
dc.b 'LDX ' ;1F
dc.b 'LDY ' ;20
dc.b 'LSR ' ;21
dc.b 'NOP ' ;22
dc.b 'ORA ' ;23
dc.b 'PHA ' ;24
dc.b 'PHP ' ;25
dc.b 'PLA ' ;26
dc.b 'PLP ' ;27
dc.b 'ROL ' ;28
dc.b 'ROR ' ;29
dc.b 'RTI ' ;2A
dc.b 'RTS ' ;2B
dc.b 'SBC ' ;2C
dc.b 'SEC ' ;2D
dc.b 'SED ' ;2E
dc.b 'SEI ' ;2F
dc.b 'STA ' ;30
dc.b 'STX ' ;31
dc.b 'STY ' ;32
dc.b 'TAX ' ;33
dc.b 'TAY ' ;34
dc.b 'TSX ' ;35
dc.b 'TXA ' ;36
dc.b 'TXS ' ;37
dc.b 'TYA ' ;38
dc.b 'ANC ' ;39
dc.b 'ANE ' ;3a
dc.b 'ARR ' ;3b
dc.b 'ASR ' ;3c
dc.b 'DCP ' ;3d
dc.b 'ISB ' ;3e
dc.b 'JAM ' ;3f
dc.b 'LAE ' ;40
dc.b 'LAX ' ;41
dc.b 'LXA ' ;42
dc.b 'RLA ' ;43
dc.b 'RRA ' ;44
dc.b 'SAX ' ;45
dc.b 'SBX ' ;46
dc.b 'SHA ' ;47
dc.b 'SHS ' ;48
dc.b 'SHX ' ;49
dc.b 'SHY ' ;4a
dc.b 'SLO ' ;4b
dc.b 'SRE ' ;4c
;==========================================================================
adrstrings ;also for tracing purposes
impstr dc.b $a,$a,0
accstr dc.b 'A',$a,$a,0
immstr dc.b '#$%02x',$a,$a,0
relstr dc.b '$%04x',$a,$a,0
zerostr dc.b '$%02x',$a,$a,0
zeroxstr dc.b '$%02x,X',$a,$a,0
zeroystr dc.b '$%02x,Y',$a,$a,0
absstr dc.b '$%04x',$a,$a,0
absxstr dc.b '$%04x,X',$a,$a,0
absystr dc.b '$%04x,Y',$a,$a,0
indxstr dc.b '($%02x,X)',$a,$a,0
indystr dc.b '($%02x),Y',$a,$a,0
indstr dc.b '($%04x)',$a,$a,0